Organize the USB-C, Battery, and Power sheets at t...
by Eric Kuzmenko 7 years 9 months
Organize the USB-C, Battery, and Power sheets at the top-level such that the power-flow makes more sense when reading the schematic
Footprints of SD card socket and demultiplexer ass...
by Christian Schilmoeller 7 years 9 months
Footprints of SD card socket and demultiplexer assigned
Add demultiplexer to uSDHC2 for the uSD and WiFi's...
by Eric Kuzmenko 7 years 9 months
Add demultiplexer to uSDHC2 for the uSD and WiFi's SDIO interfaces, include the DEMUX's (TS3A27518E) 24QFN footprint
Add MicroSD footprint from selection, add PDF file...
by Eric Kuzmenko 7 years 9 months
Add MicroSD footprint from selection, add PDF file with searchable/highlightable text
added links to datasheets
by Christian Schilmoeller 7 years 9 months
Begin WiFi+BT M.2 socket circuit, connect the asso...
by Eric Kuzmenko 7 years 9 months
Begin WiFi+BT M.2 socket circuit, connect the associated USB bus from the hub circuit, determined that the i.MX8M's UART's default POR state is such that CTS is an output and RTS is an input and assigned the signals accordingly
Begin USB 2.0 hub circuit for M.2 modules, remove ...
by Eric Kuzmenko 7 years 9 months
Begin USB 2.0 hub circuit for M.2 modules, remove supervisory/voltage monitor/watchdog circuit since the EmCraft SoM implements it

USB 2.0 hub circuit still needs to be completed.
Modify the boot config pins such that the eMMC is ...
by Eric Kuzmenko 7 years 9 months
Modify the boot config pins such that the eMMC is an 8-bit bus, depressing a momentary push button switch during boot causes SD boot, and relevant options
Have the charge controller IC handle the USB-C DRP...
by Eric Kuzmenko 7 years 9 months
Have the charge controller IC handle the USB-C DRP PD switch mechanism, notes added on what procedure is required to operate as sink/source and how to swap between these roles

The mainline kernel's TCPM implementation needs to be used in conjunction with the charge controller IC's interface. For example, if the TCPC (PTN5110HQ CC controller) has the USB configured as a sink role then the TCPM (i.MX8M) would read out the CC_STATUS and POWER_STATUS registers of the CC controller IC to know this is the case, and then it (i.MX8M) would configure the charge controller IC accordingly (sink current from VBUS).

Both the CC controller and charge controller's open-drain output interrupt pins are tied together, which means if either of them pull the line low then the i.MX8M needs to check both of their fault registers to determine if a fault has occured on either chip. If the INT pin wasn't pulled low due to a fault then a status update event from either chip may have triggered it, which needs to be determined, as well as the corresponding action taken. These INT pins may need to be separated if the software side is too complex, so long as there's a spare interrupt pins available.

Fast swap is not supported, and is not a requirement.
Add USB type C circuit with DRP PD capability, sho...
by Eric Kuzmenko 7 years 9 months
Add USB type C circuit with DRP PD capability, should sink near 2A @ 5-6.5V and source 550mA @ 5V

Removed the reverse current protection circuit from the last commit due to the requirement changing to only 18650 battery and USB-C being possible power sources

Next thing to add is the charging circuit when the USB-C is in sink mode/role
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