Move the charge controller, USB-C TCPC, and RTC to I2C1

Place and begin routing the charge controller circuit

Remove "PWM4" text since it no longer applies

Use I2C3 bus instead of I2C1 bus based on EmCraft's feedback

Change the capacitor C1718 near the ETH PHY's AVDDL2 pin 44 from 220nF to 2.2uF

Now using GPIO5_IO03 (P4.03) to put the class-D op-amp in shutdown and conserve energy when muted, make C1716 near the ETH PHY's DVDDL pin 47 220nF instead of 10uF (EmCraft suggested that this should be 100nF but their's is 220nF, asked why), added a 10k pull-down to PAM2841's ENA pin, added a 100nF cap to the smart card's C1 VCC pin, added a 1uF cap to the haptic motor circuit's 3V3_P rail

Move CAPTOUCH_~RST from BOOT_CFG_03 to GPIO1_IO05/P3.33 (was CSI_P2_PWDN), add a 10k pull-down to LCD_~RESET, make the corresponding changes to the BoM and netlist/layout

Rename all diff pairs such that they end in _P/_N rather than just P/N (underscore needed for diff pair routing)

Add component info for 10k resistors that are missing them (R105 & R220)

Replace SZMM5Z3V3T1G with MMSZ4688 zener diode which has a higher reverse working voltage to ensure that HP_DET is at a strong HIGH level when headphones/headset are inserted into the jack, replace its SOD-523 footprint with the corresponding SOD-123 footprint from the spec sheet's recommended land pattern