[IMP] hardware: v2 Bugfixes * Swap BT UART lines * Move MCU_VER to pin 6 of PIC24 as pin 65 was used in 1.x * Swap MCLK and BCLK on DIT4096 * Add Cutout to board edge for panelization * Add diagonal fiducial

[IMP] hardware: V2 System UART Fix * Swap URX/UTX pins to maintain the same mapping as 1.x boards

[IMP] hardware: V2 silkscreen * Add fiducial markings * Fix issues with silkscreen

[IMP] hardware: v2.0 Silkscreen * Update Bottom Silkscreen * Renumber Resistors

[IMP] hardware: v2.0 TEL Circuit * Add Series resistor and move MOSFETs and resistors around to support BJT usage

[IMP] hardware: V2 wiring and names * Update GND_FLT trace routing away from board cutout * Fix >NAME for some parts

[IMP] hardware: V2 Bugfixes and improvements Bug fixes: * Wire floating S/PDIF reset pin to MCU * Add pull up to MCU pin 64 for board identification Improvements: * Added a 0.3mm isolation of the ground plane * Switched by design rules to metric * Moved the pin 1 indicators out from under the ICs to the side of pin 1 * Added outlines for all passives * Moved over the impedance circuit for the S/PDIF output and kept the trace on the top layer * Moved more traces off the bottom layer * Moved the I2S lines to the top layer and reduced the VIA count from 11 to 5 * Revised all the packages in the design to ensure they matched the D/S. Specifically, the PIC24s package now has 0.3mm pads * Set the minimum trace size to 0.25mm instead of 0.20mm * Added more VIA floods for the ground plane to tie them together where the bottom layer gets bifurcated

Stuff

[IMP] hardware: V2 Improvements * Increase the footprint for C1 and fix the name location * Remove PU/PD resistors from DIT4096 * Rewire I2S lines * Fix ground pour polygon dimensions * Replace 10ohm resistor for two parallel 20ohm * Wire SMB ground to unfiltered ground * Rename all connectors and ICs per convention * Increase name size to 1mm at minimum * Add additional ground VIAs

[FIX] gitignore: Update with new paths