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blinds / hardware_design / pcb / blinds_v60.brd
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blinds / hardware_design / pcb / blinds_v60.sch
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braids / hardware_design / pcb / braids_v50.brd
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braids / hardware_design / pcb / braids_v50.sch
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branches / hardware_design / pcb / branches_v40.brd
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branches / hardware_design / pcb / branches_v40.sch
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clouds / hardware_design / pcb / clouds_v30.brd
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clouds / hardware_design / pcb / clouds_v30.sch
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ears / hardware_design / panel / ears_panel_v30.brd
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ears / hardware_design / panel / ears_panel_v30.sch
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ears / hardware_design / pcb / ears_v40.brd
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ears / hardware_design / pcb / ears_v40.sch
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edges / hardware_design / pcb / edges_expander_v01.brd
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edges / hardware_design / pcb / edges_expander_v01.sch
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edges / hardware_design / pcb / edges_v20.brd
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edges / hardware_design / pcb / edges_v20.sch
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elements / hardware_design / pcb / elements_v02.brd
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elements / hardware_design / pcb / elements_v02.sch
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frames / hardware_design / pcb / frames_v03.brd
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frames / hardware_design / pcb / frames_v03.sch
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grids / hardware_design / pcb / grids_v02.brd
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grids / hardware_design / pcb / grids_v02.sch
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kinks / hardware_design / pcb / kinks_v41.brd
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kinks / hardware_design / pcb / kinks_v41.sch
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links / hardware_design / pcb / links_v40.brd
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links / hardware_design / pcb / links_v40.sch
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marbles / hardware_design / pcb / marbles_v70.brd
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marbles / hardware_design / pcb / marbles_v70.sch
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peaks / hardware_design / pcb / peaks_v30.brd
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peaks / hardware_design / pcb / peaks_v30.sch
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plaits / hardware_design / pcb / plaits_v50.brd
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plaits / hardware_design / pcb / plaits_v50.sch
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rings / hardware_design / pcb / rings_v30.brd
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rings / hardware_design / pcb / rings_v30.sch
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ripples / hardware_design / pcb / ripples_v40.brd
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ripples / hardware_design / pcb / ripples_v40.sch
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shades / hardware_design / pcb / shades_v30.brd
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shades / hardware_design / pcb / shades_v30.sch
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shelves / hardware_design / pcb / shelves_expander_v10.brd
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shelves / hardware_design / pcb / shelves_expander_v10.sch
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shelves / hardware_design / pcb / shelves_v05.brd
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shelves / hardware_design / pcb / shelves_v05.sch
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stages / hardware_design / pcb / stages_v70.brd
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stages / hardware_design / pcb / stages_v70.sch
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streams / hardware_design / pcb / streams_v02_bargraph.brd
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streams / hardware_design / pcb / streams_v02_bargraph.sch
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streams / hardware_design / pcb / streams_v05.brd
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streams / hardware_design / pcb / streams_v05.sch
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tides / hardware_design / pcb / tides_v40.brd
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tides / hardware_design / pcb / tides_v40.sch
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veils / hardware_design / pcb / veils_v40.brd
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veils / hardware_design / pcb / veils_v40.sch
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volts / hardware_design / pcb / volts_v01.brd
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volts / hardware_design / pcb / volts_v01.sch
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warps / hardware_design / pcb / warps_v30.brd
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warps / hardware_design / pcb / warps_v30.sch
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yarns / hardware_design / pcb / yarns_v03.brd
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yarns / hardware_design / pcb / yarns_v03.sch
Last update 6 years 1 month
by
Olivier Gillet
Filesringsdspfx | |
---|---|
.. | |
chorus.h | |
ensemble.h | |
fx_engine.h | |
reverb.h |
chorus.h// Copyright 2014 Olivier Gillet. // // Author: Olivier Gillet (ol.gillet@gmail.com) // // Permission is hereby granted, free of charge, to any person obtaining a copy // of this software and associated documentation files (the "Software"), to deal // in the Software without restriction, including without limitation the rights // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell // copies of the Software, and to permit persons to whom the Software is // furnished to do so, subject to the following conditions: // // The above copyright notice and this permission notice shall be included in // all copies or substantial portions of the Software. // // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN // THE SOFTWARE. // // See http://creativecommons.org/licenses/MIT/ for more information. // // ----------------------------------------------------------------------------- // // Chorus. #ifndef RINGS_DSP_FX_CHORUS_H_ #define RINGS_DSP_FX_CHORUS_H_ #include "stmlib/stmlib.h" #include "stmlib/dsp/dsp.h" #include "rings/dsp/fx/fx_engine.h" #include "rings/resources.h" namespace rings { class Chorus { public: Chorus() { } ~Chorus() { } void Init(uint16_t* buffer) { engine_.Init(buffer); phase_1_ = 0; phase_2_ = 0; } void Process(float* left, float* right, size_t size) { typedef E::Reserve<2047> Memory; E::DelayLine<Memory, 0> line; E::Context c; while (size--) { engine_.Start(&c); float dry_amount = 1.0f - amount_ * 0.5f; // Update LFO. phase_1_ += 4.17e-06f; if (phase_1_ >= 1.0f) { phase_1_ -= 1.0f; } phase_2_ += 5.417e-06f; if (phase_2_ >= 1.0f) { phase_2_ -= 1.0f; } float sin_1 = stmlib::Interpolate(lut_sine, phase_1_, 4096.0f); float cos_1 = stmlib::Interpolate(lut_sine, phase_1_ + 0.25f, 4096.0f); float sin_2 = stmlib::Interpolate(lut_sine, phase_2_, 4096.0f); float cos_2 = stmlib::Interpolate(lut_sine, phase_2_ + 0.25f, 4096.0f); float wet; // Sum L & R channel to send to chorus line. c.Read(*left, 0.5f); c.Read(*right, 0.5f); c.Write(line, 0.0f); c.Interpolate(line, sin_1 * depth_ + 1200, 0.5f); c.Interpolate(line, sin_2 * depth_ + 800, 0.5f); c.Write(wet, 0.0f); *left = wet * amount_ + *left * dry_amount; c.Interpolate(line, cos_1 * depth_ + 800 + cos_2 * 0, 0.5f); c.Interpolate(line, cos_2 * depth_ + 1200, 0.5f); c.Write(wet, 0.0f); *right = wet * amount_ + *right * dry_amount; left++; right++; } } inline void set_amount(float amount) { amount_ = amount; } inline void set_depth(float depth) { depth_ = depth * 384.0f; } private: typedef FxEngine<2048, FORMAT_16_BIT> E; E engine_; float amount_; float depth_; float phase_1_; float phase_2_; DISALLOW_COPY_AND_ASSIGN(Chorus); }; } // namespace rings #endif // RINGS_DSP_FX_CHORUS_H_