Files
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blinds / hardware_design / pcb / blinds_v60.brd
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blinds / hardware_design / pcb / blinds_v60.sch
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braids / hardware_design / pcb / braids_v50.brd
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braids / hardware_design / pcb / braids_v50.sch
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branches / hardware_design / pcb / branches_v40.brd
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branches / hardware_design / pcb / branches_v40.sch
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clouds / hardware_design / pcb / clouds_v30.brd
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clouds / hardware_design / pcb / clouds_v30.sch
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ears / hardware_design / panel / ears_panel_v30.brd
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ears / hardware_design / panel / ears_panel_v30.sch
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ears / hardware_design / pcb / ears_v40.brd
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ears / hardware_design / pcb / ears_v40.sch
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edges / hardware_design / pcb / edges_expander_v01.brd
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edges / hardware_design / pcb / edges_expander_v01.sch
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edges / hardware_design / pcb / edges_v20.brd
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edges / hardware_design / pcb / edges_v20.sch
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elements / hardware_design / pcb / elements_v02.brd
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elements / hardware_design / pcb / elements_v02.sch
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frames / hardware_design / pcb / frames_v03.brd
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frames / hardware_design / pcb / frames_v03.sch
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grids / hardware_design / pcb / grids_v02.brd
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grids / hardware_design / pcb / grids_v02.sch
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kinks / hardware_design / pcb / kinks_v41.brd
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kinks / hardware_design / pcb / kinks_v41.sch
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links / hardware_design / pcb / links_v40.brd
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links / hardware_design / pcb / links_v40.sch
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marbles / hardware_design / pcb / marbles_v70.brd
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marbles / hardware_design / pcb / marbles_v70.sch
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peaks / hardware_design / pcb / peaks_v30.brd
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peaks / hardware_design / pcb / peaks_v30.sch
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plaits / hardware_design / pcb / plaits_v50.brd
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plaits / hardware_design / pcb / plaits_v50.sch
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rings / hardware_design / pcb / rings_v30.brd
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rings / hardware_design / pcb / rings_v30.sch
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ripples / hardware_design / pcb / ripples_v40.brd
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ripples / hardware_design / pcb / ripples_v40.sch
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shades / hardware_design / pcb / shades_v30.brd
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shades / hardware_design / pcb / shades_v30.sch
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shelves / hardware_design / pcb / shelves_expander_v10.brd
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shelves / hardware_design / pcb / shelves_expander_v10.sch
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shelves / hardware_design / pcb / shelves_v05.brd
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shelves / hardware_design / pcb / shelves_v05.sch
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stages / hardware_design / pcb / stages_v70.brd
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stages / hardware_design / pcb / stages_v70.sch
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streams / hardware_design / pcb / streams_v02_bargraph.brd
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streams / hardware_design / pcb / streams_v02_bargraph.sch
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streams / hardware_design / pcb / streams_v05.brd
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streams / hardware_design / pcb / streams_v05.sch
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tides / hardware_design / pcb / tides_v40.brd
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tides / hardware_design / pcb / tides_v40.sch
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veils / hardware_design / pcb / veils_v40.brd
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veils / hardware_design / pcb / veils_v40.sch
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volts / hardware_design / pcb / volts_v01.brd
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volts / hardware_design / pcb / volts_v01.sch
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warps / hardware_design / pcb / warps_v30.brd
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warps / hardware_design / pcb / warps_v30.sch
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yarns / hardware_design / pcb / yarns_v03.brd
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yarns / hardware_design / pcb / yarns_v03.sch
Last update 6 years 1 month
by
Olivier Gillet
system.cc// Copyright 2012 Olivier Gillet. // // Author: Olivier Gillet (ol.gillet@gmail.com) // // Permission is hereby granted, free of charge, to any person obtaining a copy // of this software and associated documentation files (the "Software"), to deal // in the Software without restriction, including without limitation the rights // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell // copies of the Software, and to permit persons to whom the Software is // furnished to do so, subject to the following conditions: // // The above copyright notice and this permission notice shall be included in // all copies or substantial portions of the Software. // // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN // THE SOFTWARE. // // See http://creativecommons.org/licenses/MIT/ for more information. // // ----------------------------------------------------------------------------- // // System level initialization. #include "braids/drivers/system.h" namespace braids { void System::Init(uint32_t timer_period, bool application) { SystemInit(); if (application) { NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x4000); } RCC_APB2PeriphClockCmd( RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_TIM1 | RCC_APB2Periph_SPI1 | RCC_APB2Periph_USART1 | RCC_APB2Periph_ADC1, ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE); RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); TIM_TimeBaseInitTypeDef timer_init; timer_init.TIM_Period = timer_period; timer_init.TIM_Prescaler = 0; timer_init.TIM_ClockDivision = TIM_CKD_DIV1; timer_init.TIM_CounterMode = TIM_CounterMode_Up; timer_init.TIM_RepetitionCounter = 0; TIM_InternalClockConfig(TIM1); TIM_TimeBaseInit(TIM1, &timer_init); TIM_Cmd(TIM1, ENABLE); NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); // 2.2 priority split. // DAC interrupt is given highest priority NVIC_InitTypeDef timer_interrupt; timer_interrupt.NVIC_IRQChannel = TIM1_UP_IRQn; timer_interrupt.NVIC_IRQChannelPreemptionPriority = 0; timer_interrupt.NVIC_IRQChannelSubPriority = 0; timer_interrupt.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&timer_interrupt); } void System::StartTimers() { TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE); SysTick_Config(F_CPU / 1000); } } // namespace braids