EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr USLedger 17000 11000
encoding utf-8
Sheet 1 12
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Sheet
S 7350 700  1200 9500
U 5E98F0A2
F0 "MCU" 50
F1 "mcu.sch" 50
F2 "TRACECLK" O L 7350 9950 50 
F3 "TRACED[3:0]" O L 7350 9850 50 
F4 "SWDIO" B L 7350 9700 50 
F5 "SWDCLK" I L 7350 9600 50 
F6 "I2S_BCLK" O R 8550 3450 50 
F7 "I2S_SD" O R 8550 3650 50 
F8 "I2S_LRCLK" O R 8550 3550 50 
F9 "SPI_MOSI" O R 8550 8850 50 
F10 "SPI_CS" O R 8550 9050 50 
F11 "SPI_CLK" O R 8550 8950 50 
F12 "I2S_SCKIN" I R 8550 8650 50 
F13 "I2S_MCLK" O R 8550 3350 50 
F14 "MIDI_RX" I R 8550 6450 50 
F15 "MIDI_TX" O R 8550 6600 50 
F16 "SDMMC_CK" O R 8550 1450 50 
F17 "SDMMC_CMD" I R 8550 1250 50 
F18 "MONO" O R 8550 3850 50 
F19 "CHSL" O R 8550 3950 50 
F20 "DEM" O R 8550 4050 50 
F21 "MUTE" O R 8550 4150 50 
F22 "FMT0" O R 8550 4250 50 
F23 "FMT1" O R 8550 4350 50 
F24 "ETH_RX_D[3..0]" I L 7350 850 50 
F25 "SDMMC_D[3..0]" I R 8550 1350 50 
F26 "SPI_MISO" I R 8550 8750 50 
F27 "USB_OTG_HS_DM" B L 7350 6550 50 
F28 "USB_OTG_HS_DP" B L 7350 6450 50 
F29 "LCD_HSYNC" O L 7350 1900 50 
F30 "LCD_VSYNC" O L 7350 2000 50 
F31 "LCD_CLK" O L 7350 2100 50 
F32 "FMC_D[31..0]" B L 7350 3250 50 
F33 "LCD_G[7..0]" O L 7350 2350 50 
F34 "LCD_B[7..0]" O L 7350 2450 50 
F35 "LCD_R[7..0]" O L 7350 2250 50 
F36 "NRST" O R 8550 4450 50 
F37 "ZERO" O R 8550 4550 50 
F38 "FMC_SDCKE0" B L 7350 3350 50 
F39 "FMC_SDNE0" O L 7350 3450 50 
F40 "FMC_SDCLK" O L 7350 3550 50 
F41 "SDNCAS" O L 7350 3650 50 
F42 "FMC_SDNRAS" O L 7350 3750 50 
F43 "LCD_DE" O L 7350 1800 50 
F44 "FMC_SDNWE" O L 7350 3850 50 
F45 "LOW_BATT" I L 7350 6150 50 
F46 "~CHARGE_LBO" I L 7350 6250 50 
F47 "CHARGE_DONE" I L 7350 6350 50 
F48 "~RESET" I L 7350 9500 50 
F49 "~POWER_GOOD" I L 7350 6650 50 
$EndSheet
$Sheet
S 5300 6050 1350 900 
U 61716B12
F0 "MCU Power" 50
F1 "mcu_power.sch" 50
F2 "LOW_BATT" O R 6650 6150 50 
F3 "~CHARGE_LBO" O R 6650 6250 50 
F4 "CHARGE_DONE" O R 6650 6350 50 
F5 "USB_DM" O R 6650 6550 50 
F6 "USB_DP" O R 6650 6450 50 
F7 "~POWER_GOOD" O R 6650 6650 50 
$EndSheet
$Sheet
S 5400 1600 1300 1050
U 6229F527
F0 "LCD" 50
F1 "lcd.sch" 50
$EndSheet
$Sheet
S 5400 3000 1300 1450
U 6229F9B6
F0 "SDRAM" 50
F1 "SDRAM.sch" 50
F2 "D[15..0]" B R 6700 3250 50 
F3 "~CS" I R 6700 3950 50 
F4 "CKE" I R 6700 3450 50 
F5 "CLK" I R 6700 3550 50 
F6 "LDQM" I R 6700 4050 50 
F7 "UDQM" I R 6700 4150 50 
F8 "~WE" I R 6700 3850 50 
F9 "~CAS" I R 6700 3650 50 
F10 "~RAS" I R 6700 3750 50 
$EndSheet
$Sheet
S 9900 3200 1750 1750
U 6274D45C
F0 "dac" 50
F1 "dac.sch" 50
F2 "SCK" I L 9900 3350 50 
F3 "BCK" I L 9900 3450 50 
F4 "LRCK" I L 9900 3550 50 
F5 "DATA" I L 9900 3650 50 
F6 "MONO" I L 9900 3850 50 
F7 "CHSL" I L 9900 3950 50 
F8 "DEM" I L 9900 4050 50 
F9 "MUTE" I L 9900 4150 50 
F10 "FMT0" I L 9900 4250 50 
F11 "FMT1" I L 9900 4350 50 
F12 "NRST" I L 9900 4450 50 
F13 "ZERO" I L 9900 4550 50 
$EndSheet
Wire Wire Line
	8550 3350 9900 3350
Wire Wire Line
	8550 3450 9900 3450
Wire Wire Line
	8550 3550 9900 3550
Wire Wire Line
	8550 3650 9900 3650
Wire Wire Line
	8550 3850 9900 3850
Wire Wire Line
	8550 3950 9900 3950
Wire Wire Line
	8550 4050 9900 4050
Wire Wire Line
	8550 4150 9900 4150
Wire Wire Line
	8550 4250 9900 4250
Wire Wire Line
	8550 4350 9900 4350
Text Notes 10000 2450 0    50   ~ 0
TODO: Think about adding master current sense to test low power modes. Also consider adding place to measure low currents
$Sheet
S 9900 6050 1000 750 
U 62009CBA
F0 "midi" 50
F1 "midi.sch" 50
F2 "MIDI_RX" O L 9900 6450 50 
F3 "MIDI_TX" I L 9900 6600 50 
$EndSheet
Wire Wire Line
	8550 6600 9900 6600
Wire Wire Line
	8550 6450 9900 6450
Wire Wire Line
	8550 4450 9900 4450
Wire Wire Line
	8550 4550 9900 4550
Wire Wire Line
	6650 6450 7350 6450
Wire Wire Line
	6650 6550 7350 6550
Wire Wire Line
	6650 6150 7350 6150
Wire Wire Line
	6650 6250 7350 6250
Wire Wire Line
	6650 6350 7350 6350
$Sheet
S 9050 900  1150 1100
U 61EEA0C4
F0 "SD Card" 50
F1 "sd-card.sch" 50
F2 "SD_CLK" I L 9050 1450 50 
F3 "SD_CMD" I L 9050 1250 50 
F4 "SD_DET_A" O L 9050 1550 50 
F5 "SD_DET_B" O L 9050 1650 50 
F6 "SD_DAT[3..0]" B L 9050 1350 50 
$EndSheet
Wire Wire Line
	8550 1250 9050 1250
Wire Bus Line
	8550 1350 9050 1350
Wire Wire Line
	8550 1450 9050 1450
Wire Wire Line
	6700 3450 7350 3450
Wire Wire Line
	6700 3550 7350 3550
Wire Wire Line
	6700 3650 7350 3650
Wire Wire Line
	6700 3750 7350 3750
Wire Wire Line
	6700 3850 7350 3850
Wire Bus Line
	6700 3250 7350 3250
$Sheet
S 5450 9000 1400 1200
U 61F7F854
F0 "Debug and Trace" 50
F1 "debug-trace.sch" 50
F2 "TRACED[3..0]" I R 6850 9850 50 
F3 "TRACE_CLK" I R 6850 9950 50 
F4 "~RESET" I R 6850 9500 50 
F5 "SWDCLK" O R 6850 9600 50 
F6 "SSWDIO" B R 6850 9700 50 
$EndSheet
Wire Wire Line
	7350 9950 6850 9950
Wire Bus Line
	6850 9850 7350 9850
Wire Wire Line
	6850 9700 7350 9700
Wire Wire Line
	6850 9600 7350 9600
Wire Wire Line
	6850 9500 7350 9500
Text Notes 5300 5850 0    50   ~ 0
TODO: Lots of stuff in MCU Power Sheet
Text Notes 5450 1450 0    50   ~ 0
TODO: Make or find LCD Connector footprint
Text Notes 5350 2900 0    50   ~ 0
TODO: Figure out how to wire up this ram
$Sheet
S 8900 8350 950  1150
U 61FF9D8B
F0 "Audio PLL" 50
F1 "pll.sch" 50
F2 "I2S_DATA" I L 8900 8850 50 
F3 "I2S_CLOCK" I L 8900 8950 50 
F4 "I2S_CS" I L 8900 9050 50 
F5 "I2S_AUDIO_CLOCK" O L 8900 8650 50 
$EndSheet
Wire Wire Line
	8900 8650 8550 8650
Wire Wire Line
	8550 8850 8900 8850
Wire Wire Line
	8550 8950 8900 8950
Wire Wire Line
	8550 9050 8900 9050
Wire Wire Line
	8550 8750 8650 8750
NoConn ~ 8650 8750
Wire Wire Line
	6650 6650 7350 6650
$EndSCHEMATC