v6 - specificato taglia di memoria 8MB del modulo ...
by
Andrea Toninelli
3 years 4 months
v6
by
Andrea Toninelli
3 years 4 months
Deleted README.md
by
Andrea Toninelli
3 years 4 months
Merge branch 'master' into 'main'
by
Andrea Toninelli
3 years 4 months
Initial commit
by
Andrea Toninelli
3 years 4 months
Merge remote-tracking branch 'origin_cadlab/master...
by
Andrea Toninelli
3 years 4 months
Merge remote-tracking branch 'origin_cadlab/master...
by
Andrea Toninelli
3 years 4 months
Deleted README.md
by
Andrea Toninelli
3 years 4 months
Initial commit
by
Andrea Toninelli
3 years 4 months
v6 - modificato PCB (TEMP - in attesa revisione me...
by
Andrea Toninelli
3 years 4 months