Altium

Design Rule Verification Report

Date: 9/30/2019
Time: 1:55:00 PM
Elapsed Time: 00:00:00
Filename: C:\Users\Public\Documents\Altium\Projects\Aim Chip Fanout Board\Aim Fanout.PcbDoc
Warnings: 0
Rule Violations: 0

Summary

Warnings Count
Total 0

Rule Violations Count
Clearance Constraint (Gap=10mil) (All),(All) 0
Short-Circuit Constraint (Allowed=No) (All),(All) 0
Un-Routed Net Constraint ( (All) ) 0
Modified Polygon (Allow modified: No), (Allow shelved: No) 0
Width Constraint (Min=10mil) (Max=10mil) (Preferred=10mil) (All) 0
Power Plane Connect Rule(Relief Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All) 0
Hole Size Constraint (Min=1mil) (Max=100mil) (All) 0
Hole To Hole Clearance (Gap=10mil) (All),(All) 0
Minimum Solder Mask Sliver (Gap=10mil) (All),(All) 0
Silk To Solder Mask (Clearance=10mil) (IsPad),(All) 0
Silk to Silk (Clearance=10mil) (All),(All) 0
Net Antennae (Tolerance=0mil) (All) 0
Room Aim Fanout (Bounding Region = (4834.764mil, 2446.693mil, 5585.866mil, 4010mil) (InComponentClass('Aim Fanout')) 0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All) 0
Total 0